The disclosed embodiments of the present invention relate to a flip chip scheme and a method of forming the flip chip scheme, and more particularly, to a flip chip scheme and a method of forming the flip chip scheme which can fit power domains, reduce IR drops, shift bumps to enhance signal routing, and have a maximum bump number in every power domain.
Applications of using regular inline-bumps or stagger-bumps have already been disclosed and discussed in various literatures, such as U.S. Pat. No. 8,350,375 and U.S. Pat. No. 7,081,672. Please refer to FIG. 1. FIG. 1 is a simplified diagram of a conventional flip chip scheme 100 as shown in FIG. 3 of the U.S. Pat. No. 8,350,375. As shown in FIG. 1, the conventional flip chip scheme 100 only use regular inline-bumps, and therefore the conventional flip chip scheme 100 is not capable of fitting non-uniform power domains and thus result in worse IR drops.
Please refer to FIG. 2. FIG. 2 is a simplified diagram of a conventional flip chip scheme 200 as shown in FIG. 8 of the U.S. Pat. No. 8,350,375. As shown in FIG. 2, the conventional flip chip scheme 200 only use regular stagger-bumps, and therefore the conventional flip chip scheme 200 is not capable of fitting non-uniform power domains and thus result in worse IR drops.